Prentice Hall
Engineering
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VHDL Primer, A, 3/E
ISBN-10: 0130965758
ISBN-13: 9780130965752
Publisher: Prentice Hall
Copyright: 1999
Format: Paper; 386 pp
Published: 09/16/1998
Status: Instock
Suggested retail price: $89.00
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The aim of this book continues to be the introduction of the VHDL language to the reader at the beginner's level. VHDL is a large and verbose language with many complex constructs that have complex semantic meanings and is initially difficult to understand (the US military requires VHDL for device designs, thus explains its popularity vs. other HDLs). The book presents a subset of VHDL consisting of commonly used features that make it both simple and easy to use.
1. Introduction.
2. A Tutorial.
3. Basic Language Elements.
4. Behavioral Modeling.
5. Dataflow Modeling.
6. Structural Modeling.
7. Generics and Configurations.
8. Subprograms and Overloading.
9. Packages and Libraries.
10. Advanced Features.
11. Model Simulation.
12. Hardware Modeling Examples.
Appendix A: Predefined Environment.
Appendix B: Syntax Reference.
Appendix C: A Package Example.
Appendix D: Summary of Changes.
Appendix E: The STD_LOGIC_1164 Package.
Appendix F: An Utility Package.
Bibliography.
Index.
J. Bhasker (Ph.D., University of Minnesota) is a member of the Technical Staff at AT&T Bell Laboratories, Allentown, PA, where he is currently working on a high-level synthesis tool that would synthesize net-lists from C or VHDL behavioral descriptions. He teaches courses on VHDL and VHDL Synthesis to internal AT&T designers as well as at Lehigh University. He is the author of A VHDL Primer (Prentice Hall) and numerous professional papers and articles. Dr. Bhasker has served as Program Committee member and session chair for the VHDL International Users Forum and was the recipient of the Honeywell Excel Pioneer Award (1987).
The power of VHDL-without the complexity!
Want to leverage VHDL's remarkable power without bogging down in its notorious complexity? Get A VHDL Primer, Third Edition. This up-to-the-minute introduction to VHDL focuses on the features you need to get results-with extensive practical examples so you can start writing VHDL models immediately.
Written by Jayaram Bhasker, one of the world's leading VHDL course developers, this best-selling guide has been completely updated to reflect the popular IEEE STD_LOGIC_1164 package. With Bhasker's help, you'll master all these key VHDL techniques:
- Behavioral, dataflow and structural modeling.
- Generics and configurations.
- Subprograms and overloading.
- Packages and libraries.
- Model simulation.
- Advanced features: Entity statements, generate statements, aliases, guarded signals, attributes, aggregate targets, and more.
The book's extensive hardware modeling coverage includes modeling of regular structures, delays, conditional operations, state machines, Moore and Mealy FSMs, clock dividers and much more. You'll find new coverage of text I/O and test benches, as well as complete listings of the IEEE TD_LOGIC_1164 package. J. Bhasker has helped tens of thousands of professionals master VHDL. With A VHDL Primer, Third Edition, it's your turn to succeed.
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©2004 | Prentice Hall | Electronic Supplement | Instock
ISBN-10: 0321267354 |
ISBN-13: 9780321267351
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