Engineering

• describes the user Instruction Set Architecture (ISA), as implemented by the R2000, R3000, R4000, and R6000 (collectively known as the R-Series) processors, together with an extension to this ISA.

• describes the general characteristics and capabilities of each RISC processor, along with a description of the programming model, memory management unit (MMU), and the registers associated with each processor.

• includes an overview of the underlying concepts that distinguish RISC architecture from Complex Instruction Set Computer (CISC) architecture.

1. RISC Architecture: An Overview.


2. MIPS Processor Architecture Overview.


3. CPU Instruction Set Summary.


4. Memory Management System.


5. Caches.


6. Exception Processing.


7. FPU Overview.


8. FPU Instruction Set Summary and Instruction Pipeline.


9. Floating Point Exceptions.


Appendixes.


Index.

Advanced Computer Architecture  [AOD TITLES]   (Electrical and Computing Engineering)
Microprocessors - RISC Chips  [AOD TITLES]   (Electrical and Computing Engineering)

Pearson Higher Education offers special pricing when you choose to package your text with other student resources. If you're interested in creating a cost-saving package for your students contact your Pearson Higher Education representative.