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Computer Systems Organization and Architecture
John D. Carpinelli, New Jersey Institute of Technology

ISBN-10: 0201612534
ISBN-13: 9780201612530

Publisher: Addison-Wesley
Copyright: 2001
Format: Paper; 584 pp
Published: 10/20/2000
Status: Instock

Suggested retail price: $115.00
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This book presents material that is appropriate for an undergraduate course on computer organization and architecture and that covers the design of CPUs, microprocessors, and computer systems. It has been heralded for its presentation style and pedagogy which make this difficult material understandable for students without sacrificing the essential elements of learning computer/architecture/organization. One hallmark feature of the author's pedagogy is the use of the Very Simple CPU and the Relatively Simple CPU. The Very Simple CPU, introduced in Chapter 6, illustrates CPU design concepts without getting too complex. The following chapter introduces the Relatively Simple CPU, which builds on the Very Simple CPU's design principles and illustrates additional concepts with gradually more complexity. The remaining chapters show the connection between their respective concepts and their relation to the Relatively Simple CPU. Students also see how these ideas are used outside the classroom, as each chapter features a real-world machine on which the discussed organization and architecture concepts are implemented.

Computer Systems Organization and Architecture supports a platform-independent hands-on approach to learning. It is accompanied by simulation software for the Relatively Simple CPU, which allows students to enter a program written in the assembly language of the CPU and simulate its execution. This allows students to see the internal organization of the CPU, how data moves about within the CPU, and how the control unit generates the control signals that coordinate activity within the CPU.

Provides simple examples to help students understand concepts without getting bogged down in details. Pg.___

Introduces the Very Simple CPU and The Relatively Simple CPU in chapters 5 and 6, which illustrate CPU design concepts in a student-friendly fashion. Pg.___

Contains platform-independent simulation software for the Relatively Simple CPU. Pg.___

Uses real-world examples to illustrate concepts in each chapter. Pg.__

Contains a chapter on Advanced Architectural Aspects of Parallel Processing. Pg.___

Engaging writing style makes material more accessible for students.

(Each chapter contains "Summary" and "Problems".)

I. DIGITAL LOGIC AND FINITE STATE MACHINES.

1. Digital Logic Fundamentals.

Boolean Algebra.

Basic Combinatorial Logic.

More Complex Combinatorial Components.

Combinatorial Circuit Designs.

Basic Sequential Components.

More Complex Sequential Components.

Programmable Logic Devices.

2. Introduction to Finite State Machines.

State Diagrams and State Tables.

Mealy and Moore Machines.

Designing State Diagrams.

From State Diagram to Implementation.

Practical Considerations.

II. COMPUTER ORGANIZATION AND ARCHITECTURE.

3. Instruction Set Architectures.

Levels of Programming Languages.

Assembly Language Instructions.

Instruction Set Architecture Design.

A Relatively Simple Instruction Set Architecture.

The 8085 Microprocessor Instruction Set Architecture.

4. Introduction to Computer Organization.

Basic Computer Organization.

CPU Organization.

Memory Subsystem Organization and Interfacing.

I/O Subsystem Organization and Interfacing.

A Relatively Simple Computer.

An 8085-based Computer.

5. Register Transfer Languages.

Micro-operations and Register Transfer Language.

Using RTL to Specify Digital Systems.

More Complex Digital Systems and RTL.

VHDL-VHSIC Hardware Description Language.

6. CPU Design.

Specifying a CPU.

Design and Implementation of a Very Simple CPU.

Design and Implementation of a Relatively Simple CPU.

Shortcomings of the Simple CPUs.

Internal Architecture of the 8085 Microprocessor.

7. Microsequencer Control Unit Design.

Basic Microsequencer Design.

Design and Implementation of a Very Simple Microsequencer.

Design and Implementation of a Relatively Simple Microsequencer.

Reducing the Number of Microinstructions.

Microprogrammed Control vs. Hardwired Control.

A (Mostly) Microcoded CPU: The Pentium Microprocessor.

8. Computer Arithmetic.

Unsigned Notation.

Signed Notation.

Binary Coded Decimal.

Specialized Arithmetic Hardware.

Floating Point Numbers.

The IEEE 754 Floating Point Standard.

9. Memory Organization.

Hierarchical Memory Systems.

Cache Memory.

Virtual Memory.

Beyond the Basics of Cache and Virtual Memory.

Memory Management in a Pentium/Windows Personal Computer.

10. Input/Output Organization.

Asynchronous Data Transfers.

Programmed I/O.

Interrupts.

Direct Memory Access.

I/O Processors.

Serial Communication.

Serial Communication Standards.

III. ADVANCED TOPICS.

11. Reduced Instruction Set Computing.

RISC Rationale.

RISC Instruction Sets.

Instruction Pipelines and Register Windows.

Instruction Pipeline Conflicts.

RISC vs. CISC.

The Itanium Microprocessor.

12. Introduction to Parallel Processing.

Parallelism in Uniprocessor Systems.

Organization of Multiprocessor Systems.

Communication in Multiprocessor Systems.

Memory Organization in Multiprocessor Systems.

Multiprocessor Operating Systems and Software.

Parallel Algorithms.

Alternative Parallel Architectures.

Index.

Computer Organization and Architecture (Computer Science)

Companion Website
Carpinelli
©2001 | Addison-Wesley | On-line Supplement | Estimated Availability : 10/01/2000
ISBN-10: 0201729814 | ISBN-13: 9780201729818
URL: http://www.aw.com/carpinelli

Instructor's Manual
Carpinelli
©2001 | Addison-Wesley | On-line Supplement | Instock
ISBN-10: 0321357329 | ISBN-13: 9780321357328
View Downloadable Files

Solutions Manual
Carpinelli
©2001 | Addison-Wesley | On-line Supplement | Instock
ISBN-10: 0321357337 | ISBN-13: 9780321357335
View Downloadable Files

Companion Website
Carpinelli
©2001 | Addison-Wesley | On-line Supplement | Estimated Availability : 10/01/2000
ISBN-10: 0201729814 | ISBN-13: 9780201729818
URL: http://www.aw.com/carpinelli

Interwrite Personal Response System
EduCue, Addison-Wesley & Benjamin Cummings
©2004 | Addison-Wesley | Electronic Supplement | Instock
ISBN-10: 0321267354 | ISBN-13: 9780321267351

Companion Website
Carpinelli
©2001 | Addison-Wesley | On-line Supplement | Estimated Availability : 10/01/2000
ISBN-10: 0201729814 | ISBN-13: 9780201729818
URL: http://www.aw.com/carpinelli

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